| Summary: | 碩士 === 元智大學 === 電機工程學系 === 103 === The data of multimedia communications very huge and the greater the video compression is necessary can improve transmission efficiency. This causes a serious problem, data dependency, among each frame. Once the part of bitstream is corrupted, this aection is also propagated to next reconstructed frame. This aection is called error propagation that can seriously degrade the visual quality. For video decoder, if the received video bitstream is corrupted, the error concealment is activated to eliminate the error propagation. Separated-Direction Interpolation (SDI) algorithm comprises two core technologies:1) Corrupted Block Partition,2) standard deviation of the decision mechanism. The experimental result with seven 1080p sequences in quantization parameter (QP) 28 for the display algorithm performance efficienct evaluation is good, but the hardware share rate is low. TLSI algorithm, the core technology is the interpolation computation execution into Two-Level, making use of Two-Level Shared interpolation operation within the same hardware to achieve high shared hardware rate, but it can not improve hardware utilization rate. To overcome this problem, the MCR algorithm is proposed. It makes the arithmetic operations of EC compliant with those of MC. This indicates arithmetic operations can be shared with each other. Both MC and EC can be processed on an identical hardware architecture instead of individual ones. Consequently, the limitation on hardware utilization for joint MC and EC can be eliminated. This work is realized with the technology of TSMC 0.18um CMOS process. The throughputs of MC and EC are 1.0 Gpixels/sec and 320 Mpixels/sec, respectively. Experiment results reveal that this work demonstrates a competitive performance on hardware-efficiency.
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