A Piezoelectric Vibration Energy Harvesting System with Improved Power Extraction Capability

碩士 === 國立中正大學 === 電機工程研究所 === 104 === This thesis completes the input of the piezoelectric energy harvesting system and has a maximum power point tracking with improved power extraction capability. Although vibrations in the surrounding environment produce a vast amount of energy over time, tiny tra...

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Bibliographic Details
Main Authors: HU,YIN-CHUN, 胡尹駿
Other Authors: TSAI,TSUNG-HENG
Format: Others
Language:zh-TW
Published: 2016
Online Access:http://ndltd.ncl.edu.tw/handle/03678998416973423718
Description
Summary:碩士 === 國立中正大學 === 電機工程研究所 === 104 === This thesis completes the input of the piezoelectric energy harvesting system and has a maximum power point tracking with improved power extraction capability. Although vibrations in the surrounding environment produce a vast amount of energy over time, tiny transducers can harness only a limited amount of power, especially when the mechanical movements are weak as in the case of many ambient vibrations. Therefore, the harvester circuit must be able to condition the transducer to improve the energy-conversion capability and efficiently transfer energy into electrical storage devices. The proposed MPPT algorithm is based on the point slope formula. The output voltage of the rectifier, Vrect, is sampled twice at the beginning of one conversion cycle. Through the proposed double-sampling technique, the open-circuit voltage VOC is predicted. The detectable range of MPPT is extended without high voltage process. The power extraction capability from the piezoelectric harvester is improved over the typical fractional VOC method. The tracking time is largely reduced. Moreover, it is not required to temporarily open the circuits and interrupt the power conversion when tracking the maximum power points. To further improve the conversion efficiency, when the energy harvester is in the harvesting phase, the 0.5VOC predicting unit is disabled. The MPP tracking time is 46 μs and the maximum efficiency is 98.7%. Finally, the chip is implemented by Taiwan Semiconductor Manufacturing Company (TSMC) 0.18μm 1P6M CMOS mixed-signal polycide process. The package of chip is 48S/B and the die area of the proposed chip is 1.3×1.3 mm2.