Evaluation of Thermal Deformation and Strength of Silicon Interposer Used in 2.5D IC Package

• Main Authors: Huan Yin Liu, 劉桓吟
• Other Authors: M. Y. Tsai
• Format: Others
• Language: zh-TW
• Published: 2016
• Online Access: http://ndltd.ncl.edu.tw/handle/36dvh8

碩士 === 長庚大學 === 機械工程學系 === 104 === With the advances of the electronic packaging, 2.5D IC and 3D IC with Cu through silicon vias (copper TSVs) which can providing the improvement of circuit density and interconnect performance become a trend. In every 2.5D IC, there is a Cu TSVs interposer for connecting with IC chips and substrate ,The existing Cu TSVs might make the silicon interposers more fragile, due to structural non-homogeneity and weak interface. So the strength of silicon interposers for reliability of package becomes one of important issues. The first part of this study is to determine the strength of silicon interposers using a point-load-on-elastic-foundation (PoEF) test, associated with an acoustic emission (AE) method of detecting local material cracks of delamination occurring during the test before the interposer breaking. In this part, the result shows the AE system can detect the micro cracks and failure mode of Cu TSVs interposer. The second part is interposer strength comparison using PoEF theory and finite element simulation. In this part, The result shows that the non-linear mechanical property of Cu plays an important role on the strength determination. The last part is to quantify the stress state of the interposer inside a 2.5D package during the solder reflow heating by shadow moiré experiment and finite element simulation. The results show the solder-reflow-induced stress state of the interposer in 2.5D package with and without a metal frame is well below the strength of interposer. Keyword: 2.5D package, Acoustic emission, Cu TSVs, Interposer, Die strength, Thermal loading, Failure mode