Improvising the Rinse Efficiency in a Wafer Rinse Process Using 3D Numerical Modeling and Flow Visualization Methods
碩士 === 國立成功大學 === 機械工程學系 === 104 === Semiconductor wafers, which is the base of any semiconductor devices subjects to numerous bathing in a wafer rinsing tank post each processing operation, in order to remove surface contamination that arises during the manufacturing protocols. However in this meth...
Main Authors: | , |
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Other Authors: | |
Format: | Others |
Language: | zh-TW |
Published: |
2016
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Online Access: | http://ndltd.ncl.edu.tw/handle/25786882112349552898 |