| Summary: | 碩士 === 國立交通大學 === 電機學院電子與光電學程 === 104 === In this Thesis, a low noise, small die size, low power consumption of programmable 0.18um CMOS analog front-end IC for biomedical signal acquisition is presented. The design deals with Electrocardiogram (ECG) while reject electrode offset, common mode offset and solve flicker noise by differential pair circuit and chopper stabilized technique with a current feedback operation amplifier. The analog front-end circuit contain three stage of amplifier, first stage of amplifier achieve 0.32 μVrms input referred noise and noise-efficient factor (NEF) of 2.42, second stage of amplifier achieve with trans-conductance gain is 1000 of GM amplifier and to filter the chopper noise of sinc antialiasing filter. Third stage is a notch for filter the power line interference. Due to the structure of circuit is very simple, the die area is 0.81mm2 and power consumption is 8.35μA.
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