Investigation on High Performance of Poly-Si and AP-PECVD Fabricated In-Ga-Zn-O Thin Film Transistors with Low Temperature Technology

• Main Authors: Huang, Bo-Wen, 黃柏文
• Other Authors: Chang, Kow-Ming
• Format: Others
• Language: en_US
• Published: 2016
• Online Access: http://ndltd.ncl.edu.tw/handle/4ubu7m

博士 === 國立交通大學 === 電子工程學系 電子研究所 === 104 === Low mobility issue will be harder to realize higher resolution for faster frame rate and a larger panel size, thus low-temperature polycrystalline-silicon thin-film transistors (LTPS-TFTs) and indium-gallium-zinc-oxide TFTs (IGZO-TFTs) are potential candidates for future technology of 3D displays. However, various kinds of defects pre-existing in the fabricated TFTs due to process damage, thermal issues, stress issues, bias instabilities, and intrinsic materials properties would influence the performance of TFTs. Consequently, it is essential to passivate these kinds of defects pre-existing in the fabricated TFTs. Low-temperature technology is practically because it can not affect the original thermal budget and compatible to conventional process flow. In this dissertation, low temperature technologies including dual plasma treatment (DPT), N2 plasma treatment (NPT) treated by PECVD system, in-situ hydrogen plasma treatment (HPT) treated by APPJ, re-oxidation of IGZO thin films treated by neutral beam (NB) system (NBRO), and microwave assisted annealing (MWAA) treated by MW system are introduced to AP-PECVD fabricated IGZO TFTs (AP-IGZO TFTs). Besides, AP-PECVD is suitable to realize large-area depositions without expensive vacuum system in the room temperature ambient. Consequently, the above-mentioned low-temperature methods are compatible to LTPS- and AP-IGZO TFTs. First topic is demonstrated the application of DPT to LTPS-TFTs with high-κ HfO2 gate dielectric. The DPT involves a pre-deposition CF4 plasma treatment at a high-κ/poly-Si interface and post-deposition N2 plasma treatment at a high-κ HfO2 gate dielectric; LTPS-TFTs with DPT demonstrate excellent electrical characteristics. Flicker noise caused by fluctuations of carriers transported in the grain boundary and the trapped carriers per unit oxide volume (Nt) can be suppressed. Besides, DPT samples under positive bias temperature instability (PBI) and negative bias temperature instability (NBI) stresses exhibited different degradation phenomena because of different polarity trapped oxide charges. Experimental data exhibited better reliability immunity for PBI stress than NBI stress after DPT. We proposed a novel reliability mechanism called the quasi reaction–diffusion model to explain the generation of ΔNit under PBTI. Second topic is to illustrate the NPT for high-κ ZrO2 gate dielectric stacked with IGZO-TFTs. Experimental results reveal that a suitable incorporation of nitrogen atoms could enhance the device performance by eliminating the oxygen vacancies and provide an amorphous surface with better surface roughness. The best performance of the AP-PECVD IGZO TFTs are obtained with 20W-90sec N2 plasma treatment with field-effect mobility (FE) of 22.5 cm2/V-s, subthreshold swing (SS) of 155 mV/dec, and on/off current ratio (Ion/Ioff) of 1.49107. In the third topic, AP-IGZO TFTs were firstly treated by post deposition of in-situ HPT. Samples with the post in-situ HPT on IGZO active layer exhibited higher FE of 20.12 cm2/V·S, VT of 1.11 V, SS of 93 mV/decade, Ion/Ioff of 5.34×107. The excellent IGZO TFTs fabricated by AP-PECVD technique also show highly transparent characteristics. Furthermore, positive and negative gate bias stress (PBS and NBS) are applied to investigate the instability of in-situ HPT treated a-IGZO TFTs. In the Fourth topic, neutral beam re-oxidation (NBRO) were employed for the fabrication of AP-IGZO TFTs. Device with 400W NBRO treatment demonstrated excellent electrical characteristics with VT of 0.47 V, improved Ion/Ioff current ratio of 3.7106, high FE of 10.72 cm2/V-s, and low SS of 100 mV/dec. Besides, device with dual treatment of in-situ hydrogen incorporated treatment and 400W NBRO treatment demonstrated excellent electrical characteristics with high FE of 34.05 cm2/V-s, and low SS of 62 mV/decade. In the final topic, microwave assisted annealing (MWAA) on AP-IGZO TFTs are investigated. MVAA with 300W for 100sec treatment on AP-IGZO TFTs have been fabricated successfully and show excellent electrical characteristics including a VT of -1.23 V, SS of 0.18 V/dec, µFE of 17.4 cm2/V-s, and Ion/Ioff ratio of 8.14106. Experimental results reveal that a suitable MWAA condition have smaller time evolutions of threshold voltage shift (ΔVTH) than no treatment. The quantitative analysis of ΔNt and ΔNot indicate effectiveness for MWAA on AP-IGZO TFTs under PBS. Besides, stretched exponential time dependence model is used to analyze the mechanism of AP-IGZO TFTs under PBTI stress.