| Summary: | 博士 === 國立中央大學 === 化學工程與材料工程學系 === 104 === In recent years, the size of interconnections in the electronic devices are continuously shrinkage as the rapidly development of the electronic packaging industry. It can provide much higher I/O (input/output) ratio for the requirement of faster, thinner, and reliable electronic devices. Meanwhile, the three-dimensional integration technique has great potential for the coming decades. The most important issue for the reduction size of the interconnections would be the structural defects in the micro-joints. According to the solder would be consumed in a short reflow time, the mechanical properties of the intermetallic compounds at the micro-joint interface should be concerned.
In the first part of this thesis, we observed that microstructure of the Sn-Bi solders that reflowed on the substrates would be affected by the composition of the solder and the roughness on the surface of the substrate. We could obtain a void-free micro-joint interface when we increase the Sn content in the Sn-Bi solder and the roughness on the substrate surface. Also, the discontinuously segregated Bi phases at the interface would provide good mechanical properties for micro-joint.
Second, we figured out the segregated Bi phase at the micro-joint interface would related to the growth kinetic of the intermetallic compounds at the interface. As the scallop-like IMC grains grow at the interface and approached to the substrate enough, it would prevent the voids formed at the interface. Also, the discontinuously segregated Bi phases at the interface were attributed to the growth of the IMC grains. The growth of the IMC grains would expel the molten Sn-Bi solder away from the IMC grains at the interface. And the driving force that for expelling the molten solder would be inhibited with the increasing Bi content in the Sn-Bi solder.
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