Capacitive Coupling Techniques for Chip-to-Chip Communication
碩士 === 國立東華大學 === 電機工程學系 === 104 === This thesis investigates the chip-to-chip communication in three-dimensional integrated circuits by using dielectric or conductive material as the transport layer. The Raphael build three-dimensional parasitic model and Hspice simulate circuits. Moreover, the des...
Main Authors: | , |
---|---|
Other Authors: | |
Format: | Others |
Published: |
2016
|
Online Access: | http://ndltd.ncl.edu.tw/handle/2nkj76 |