High Mobility and Enhanced Reliability Amorphous Indium-Gallium-Zinc Oxide Thin-Film Transistors
碩士 === 國立臺灣大學 === 電子工程學研究所 === 104 === The electrical characterization and reliability of top-gate a-IGZO thin-film transistors (TFTs) with various channel length (12 m - 4 m) but fixed channel width and inter layer dielectric (ILD) length are discussed. As channel length decreases, the electric...
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ndltd-TW-104NTU054280612017-04-29T04:31:56Z http://ndltd.ncl.edu.tw/handle/25895714862621118961 High Mobility and Enhanced Reliability Amorphous Indium-Gallium-Zinc Oxide Thin-Film Transistors 高載子遷移率及穩定度改善之非晶相銦鎵鋅氧化物薄膜電晶體 Chieh Lo 羅傑 碩士 國立臺灣大學 電子工程學研究所 104 The electrical characterization and reliability of top-gate a-IGZO thin-film transistors (TFTs) with various channel length (12 m - 4 m) but fixed channel width and inter layer dielectric (ILD) length are discussed. As channel length decreases, the electrical properties and reliability are improved. This is due to the fact that the hydrogen atoms from ILD that are deposited with high SiH4 flow rate diffuse into the region at channel edge. Short channel devices have large proportion of high hydrogen incorporated region at channel edge. It is reported that the hydrogen incorporated in a-IGZO acts as donors and passivate defects. This leads that short channel devices show better performance. The devices with channel length of 4 m exhibit a high mobility of 26 cm2/V-s, a SS of 155 mV/dec and a hysteresis of 39 mV. The origins of instability of threshold voltage (VT) shift after reliability test are discussed. After positive bias stress (PBS), electrons are trapped into shallow states or trapped into gate insulator causing a positive VT shift. On the other hand, after negative bias stress (NBS), only a few inverted holes are trapped into gate insulator leading to a slightly negative VT shift. After the negative bias illumination stress (NBIS), ionized deep states in the channel resulted in a negative VT shift. The NBS normally yields a negative VT shift of the TFTs. However, a positive VT shift after NBS of the device with the post IGZO deposition annealing at 400 oC is observed in etching-stop layer type a-IGZO TFTs. The Na+ incorporation from Mo gate into the gate insulator after 400 oC annealing is responsible for this abnormal VT shift. The movement of Na+ ions toward the gate electrode by the negative gate bias decreases the distance between the gate electrode and the Na+ ions. Therefore, the voltage drop between the gate electrode and the Na+ ions reduces, and a corresponding positive VT shift is observed. Inserting a SiNx layer between the SiOx gate insulator and the Mo gate electrode can reduce the Na+ mobility, and thus resumes a normal negative VT shift. Chee Wee Liu Ying-Jay Yang 劉致為 楊英杰 2016 學位論文 ; thesis 63 en_US |
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碩士 === 國立臺灣大學 === 電子工程學研究所 === 104 === The electrical characterization and reliability of top-gate a-IGZO thin-film transistors (TFTs) with various channel length (12 m - 4 m) but fixed channel width and inter layer dielectric (ILD) length are discussed. As channel length decreases, the electrical properties and reliability are improved. This is due to the fact that the hydrogen atoms from ILD that are deposited with high SiH4 flow rate diffuse into the region at channel edge. Short channel devices have large proportion of high hydrogen incorporated region at channel edge. It is reported that the hydrogen incorporated in a-IGZO acts as donors and passivate defects. This leads that short channel devices show better performance. The devices with channel length of 4 m exhibit a high mobility of 26 cm2/V-s, a SS of 155 mV/dec and a hysteresis of 39 mV.
The origins of instability of threshold voltage (VT) shift after reliability test are discussed. After positive bias stress (PBS), electrons are trapped into shallow states or trapped into gate insulator causing a positive VT shift. On the other hand, after negative bias stress (NBS), only a few inverted holes are trapped into gate insulator leading to a slightly negative VT shift. After the negative bias illumination stress (NBIS), ionized deep states in the channel resulted in a negative VT shift.
The NBS normally yields a negative VT shift of the TFTs. However, a positive VT shift after NBS of the device with the post IGZO deposition annealing at 400 oC is observed in etching-stop layer type a-IGZO TFTs. The Na+ incorporation from Mo gate into the gate insulator after 400 oC annealing is responsible for this abnormal VT shift. The movement of Na+ ions toward the gate electrode by the negative gate bias decreases the distance between the gate electrode and the Na+ ions. Therefore, the voltage drop between the gate electrode and the Na+ ions reduces, and a corresponding positive VT shift is observed. Inserting a SiNx layer between the SiOx gate insulator and the Mo gate electrode can reduce the Na+ mobility, and thus resumes a normal negative VT shift.
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author2 |
Chee Wee Liu |
author_facet |
Chee Wee Liu Chieh Lo 羅傑 |
author |
Chieh Lo 羅傑 |
spellingShingle |
Chieh Lo 羅傑 High Mobility and Enhanced Reliability Amorphous Indium-Gallium-Zinc Oxide Thin-Film Transistors |
author_sort |
Chieh Lo |
title |
High Mobility and Enhanced Reliability Amorphous Indium-Gallium-Zinc Oxide Thin-Film Transistors |
title_short |
High Mobility and Enhanced Reliability Amorphous Indium-Gallium-Zinc Oxide Thin-Film Transistors |
title_full |
High Mobility and Enhanced Reliability Amorphous Indium-Gallium-Zinc Oxide Thin-Film Transistors |
title_fullStr |
High Mobility and Enhanced Reliability Amorphous Indium-Gallium-Zinc Oxide Thin-Film Transistors |
title_full_unstemmed |
High Mobility and Enhanced Reliability Amorphous Indium-Gallium-Zinc Oxide Thin-Film Transistors |
title_sort |
high mobility and enhanced reliability amorphous indium-gallium-zinc oxide thin-film transistors |
publishDate |
2016 |
url |
http://ndltd.ncl.edu.tw/handle/25895714862621118961 |
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