Noise Suppression Techniques for PFC/PWM Combo IC

• Main Authors: Jung-Piao Wu, 吳榮標
• Other Authors: Huang-Jen Chiu
• Format: Others
• Language: zh-TW
• Published: 2016
• Online Access: http://ndltd.ncl.edu.tw/handle/55865008013481924101

碩士 === 國立臺灣科技大學 === 電子工程系 === 104 === This thesis is proposed to investigate the noise suppression techniques for a PFC/PWM combo IC. When powers on, input current transient noise interferes a 400-W power supply unit’s current sampling and causes the power MOSFET malfunction or damage. Thus, the PFC circuit is modified to suppress the noise according to the measured abnormal signals. After modified, the new design circuit validated at different temperature environments, power sources, and voltage conditions is implemented. As a result of validation, the noise in input current is improved, and the most important of all, the MOSFET of power factor corrector boost circuit would not switch disorder even if the noise exists. The PFC/PWM combo IC can work normally.