Design and Implementation of the Radio Frequency Energy Harvester for GSM

碩士 === 國立臺北科技大學 === 電機工程研究所 === 104 === This thesis presents a radio-frequency energy harvester for GSM Band. The energy harvester consists of a matching network, a rectifier and a multiplier. The matching network is used not only to obtain the maximum power transfer by resistive match technique, bu...

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Main Authors: ZHENG,XIANG-JUN, 鄭祥鈞
Other Authors: Wu,Chao-Cheng
Language:zh-TW
Published: 2015
Online Access:http://ndltd.ncl.edu.tw/handle/27mm49
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spelling ndltd-TW-104TIT054420012019-05-15T22:34:50Z http://ndltd.ncl.edu.tw/handle/27mm49 Design and Implementation of the Radio Frequency Energy Harvester for GSM 適用於GSM的射頻能量擷取裝置 之設計與實現 ZHENG,XIANG-JUN 鄭祥鈞 碩士 國立臺北科技大學 電機工程研究所 104 This thesis presents a radio-frequency energy harvester for GSM Band. The energy harvester consists of a matching network, a rectifier and a multiplier. The matching network is used not only to obtain the maximum power transfer by resistive match technique, but also and to have the maximum conversion efficiency. Furthermore, the native MOS is adopted with ultra-low threshold voltage (Vth) to improve the conversion efficiency at ultra-low power input. With respect to multiplier, the DVM (Dickson Voltage Multiplier) with Differential-drive schematic is selected to enhance the output voltage which is driven by differential RF input. Circuit design and simulation are completed with TSMC 0.18-μm 1P6M standard CMOS process. The simulation results present that the power efficiency, the output voltage and the input return loss are 28.83%, 2.5 volt and -47.285dB, respectively, with an input power of -10dBm and load impedance of 239k Ω in GSM band  Wu,Chao-Cheng Sung,Guo-Ming 吳昭正 宋國明 2015 學位論文 ; thesis zh-TW
collection NDLTD
language zh-TW
sources NDLTD
description 碩士 === 國立臺北科技大學 === 電機工程研究所 === 104 === This thesis presents a radio-frequency energy harvester for GSM Band. The energy harvester consists of a matching network, a rectifier and a multiplier. The matching network is used not only to obtain the maximum power transfer by resistive match technique, but also and to have the maximum conversion efficiency. Furthermore, the native MOS is adopted with ultra-low threshold voltage (Vth) to improve the conversion efficiency at ultra-low power input. With respect to multiplier, the DVM (Dickson Voltage Multiplier) with Differential-drive schematic is selected to enhance the output voltage which is driven by differential RF input. Circuit design and simulation are completed with TSMC 0.18-μm 1P6M standard CMOS process. The simulation results present that the power efficiency, the output voltage and the input return loss are 28.83%, 2.5 volt and -47.285dB, respectively, with an input power of -10dBm and load impedance of 239k Ω in GSM band 
author2 Wu,Chao-Cheng
author_facet Wu,Chao-Cheng
ZHENG,XIANG-JUN
鄭祥鈞
author ZHENG,XIANG-JUN
鄭祥鈞
spellingShingle ZHENG,XIANG-JUN
鄭祥鈞
Design and Implementation of the Radio Frequency Energy Harvester for GSM
author_sort ZHENG,XIANG-JUN
title Design and Implementation of the Radio Frequency Energy Harvester for GSM
title_short Design and Implementation of the Radio Frequency Energy Harvester for GSM
title_full Design and Implementation of the Radio Frequency Energy Harvester for GSM
title_fullStr Design and Implementation of the Radio Frequency Energy Harvester for GSM
title_full_unstemmed Design and Implementation of the Radio Frequency Energy Harvester for GSM
title_sort design and implementation of the radio frequency energy harvester for gsm
publishDate 2015
url http://ndltd.ncl.edu.tw/handle/27mm49
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