Multi-rate PWM with Deadtime Compensation

• Main Authors: Chyi-Sheng Huang, 黃齊聖
• Other Authors: Keng-Yuan Chen
• Format: Others
• Language: zh-TW
• Published: 2016
• Online Access: http://ndltd.ncl.edu.tw/handle/49198195526323666347

碩士 === 元智大學 === 電機工程學系 === 104 === A multi-rate filtered PWM (MRFPWM) is proposed to improve both baseband harmonics distortion and the switching loss of the voltage source inverters (VSIs). In the conventional SVPWM, it is a tradeoff to select between a lower harmonics distortion or a lower switching loss. In the proposed scheme, the dependency of harmonics distortion and switching loss is alleviated by separating the modulator into two blocks with different operating frequencies -- optimal filter block that operates at calculative frequency and switching generation block that switches at carrier frequency. Therefore, the harmonics components are attenuated by increasing the calculative frequency and the switching loss is reduced with low carrier frequency. Two simulations are done in this work. The first one drives the ideal five-phase VSI by using SVPWM and the proposed multi-rate FPWM in Matlab. Time/frequency domain analysis of the produced phase voltages under various carrier frequencies are shown. Second, the proposed modulator is applied to the five-phase VSI built by PSIM with deadtime 2us. Further, a experimental platform of five-phase VSI drive is built. Comparing with conventional SVPWM, both simulations and experiments confirm the ability of current harmonics attenuation of the proposed MRFPWM under lower carrier frequency.