Theoretical Investigation of Optimized Nanowire Diameter and Short Channel Effects for Gate-All-Around III-V Tunnel FETs

• Main Authors: Wang, Yu-Wei, 王佑瑋
• Other Authors: Su, Pin
• Format: Others
• Language: en_US
• Published: 2016
• Online Access: http://ndltd.ncl.edu.tw/handle/44732999900811713543

碩士 === 國立交通大學 === 電子研究所 === 105 === This thesis investigates the diameter dependence for III-V gate-all-around homojunction and heterojunction TFET using TCAD numerical simulation. The optimized diameter has been shown due to the counterbalance of the gate control and the quantum confinement effect. In addition, model calculation for the homojunction TFET is proposed and verified with TCAD numerical simulation. Source and drain depletion is very important in modeling of TFET. The diameter dependence by model calculation also shows the same trend with TCAD numerical simulation. Finally, the short channel effect of TFET has been compared with MOSFET with considering the source-to-drain tunneling current for MOSFET. Our results indicate the scalability of MOSFET is worse than TFET due to the lowering of the tunneling barrier and the tunneling length with decreasing the gate length.