Effect of Channel Concentration and Boron Penetration on Poly-Si Junctionless Accumulation Mode FinFETs
碩士 === 國立交通大學 === 電子物理系所 === 105 === In this thesis, we used the double patterning to successfully fabricate devices, which with sub-30 nm channel dimension without the use of advanced lithography tools, implantation processes, and plasma treatments. The Pi gate (PG) poly-Si junctionless accumulatio...
Main Authors: | Chan, Yi-De, 詹宜得 |
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Other Authors: | Chao, Tien-Sheng |
Format: | Others |
Language: | en_US |
Published: |
2017
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Online Access: | http://ndltd.ncl.edu.tw/handle/u49wnr |
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