Design of Content-Addressable Memories Using CNTFET Devices

• Main Authors: ZHAN,JIA-HAN, 詹家翰
• Other Authors: Meng-Chou Chang
• Format: Others
• Language: zh-TW
• Published: 2017
• Online Access: http://ndltd.ncl.edu.tw/handle/wmgtm9

碩士 === 國立彰化師範大學 === 電子工程學系 === 105 === Content-addressable memory (CAM) compares input search data in parallel against a table of stored data, and then returns the address of the matching data. CAMs can be used in a wide variety of applications which requires high-speed parallel search. As the feature size continues to shrink and the corresponding transistor density increases, the planar MOSFET suffers from the increasing subthreshold and gate leakage currents. Carbon nanotube transistors (CNTFETs) are promising devices to overcome the shortcomings of the traditional planar MOSFETs because CNTFETs have distinctive one-dimensional band-structure that can suppress backscattering and support near-ballistic operation. Moreover, the threshold voltage of a CNTFET can be controlled by its diameter, which is determined by the chirality vector of the carbon nanotubes in the CNTFET. Thus, CNTFETs can easily support multi-threshold design. This thesis deals with the design of ternary content-addressable memory (TCAM) with CNTFET devices. First, we explored the optimal design of ternary inverters, and we have proposed a novel ternary inverter which dissipates less power than other ternary inverters. Second, we proposed a novel TCAM structure, called Ternary-Inverter-Based TCAM (TIB TCAM), which exhibits the advantages of smaller area and lower power consumption than other TCAMs. In order to evaluate the performance of the proposed TIB TCAM, we have performed HSPICE simulations using Stanford University CNFET (Carbon Nanotube Field Effect Transistors) Hspice model. Simulation results showed that the proposed TIB TCAM can reduce power dissipation by 41.1% and reduce TCAM search time by 11.8% compared to traditional TCAMs.