| Summary: | 碩士 === 國立清華大學 === 電子工程研究所 === 105 === As everyone knows, the Neural Network is one of the most popular subject matters at the present days. The well known example is AlphaGo system which has the ability of artificial intelligence to play Chinese Chess (Wei Chi). The essence concept of AlphaGo system is to build up computer to have the self-learning function through the learning system of Neural Network. Furthermore, the final goal of Neural Network is to make the computer has the ability to play Wei Chi with human beings by using computer’s self-practice and self-playing. Therefore, how to produce the Neural Network into hardware of IC Chip for reaching the functions which are mentioned above becomes a very excited and expectable research theme.
Currently, the main trend of Neural Network is still using computer to do the operation, and for human beings’ understanding of today, “Being’s brain” is one of the strongest operation system, and is the operation system of depletion the least energy and capacity. Therefore, if we can create the design of Bionic Hardware to transfer the Neural Network into a hardware of IC chip, then we can reduce the energy and capacity depletion during doing the operations, besides, we can apply the good result either to the other hardware systems which are using the architectures of Neural Network or to the system expansion of Neural Network.
However, when we are researching the system of Neural Network, we have to point out one very important issue: “Whether we can add the noise into the system or not?” The reason is in the architecture of Neural Network, if we add the noise into system’s signal, we can prevent the whole system from the condition of over-studying. Therefore, when we try to create the hardware of IC chip, we have to consider about adding the System Block for producing the noise which is similar with the Gaussian Distribution Noise. No doubt, to design the System Block must increase the design hardness of IC chip and the depletion of energy and capacity. Based on these considerations, instead of doing extra design of System Block, how to use the noise which is from Transistor of IC chip to add it into Circuit’s signal becomes a very challenging and eager research goal.
The main point of this theme is to make a research of creating a transistor which has the function of noise adjustable. And the components of the transistor can be embedded into the design of general circuit. Besides, the transistor also can be completed the production by the standard process of CMOS stead of completing it by doing extra special process. Therefore, in the theme, I tried to propose an effective calculation method to build up the simulation model of transistor, to use the architecture of circuit for the purpose of conducting the function of noise controllable in the circuit, and to expect the fact can come true that the transistor can be applied to the hardware of IC chip of Neural Network.
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