| Summary: | 碩士 === 國立雲林科技大學 === 電子工程系 === 105 === This research presents the simulation results of pulse width modulation and pulse position modulation (Joint PWM/PPM). During the PPM data transmissions, the PWM duty cycle changed from 40% to 80%, in the process of data transmission simultaneously to achieve dimming control of visible light communication (VLC).
LED channel effect of VLC, resulting in the phenomenon of inter-symbol interference (ISI), so this thesis uses the post-equalization circuit to improve the LED bandwidth limit, and display PPM signal in different guard time (slot) bit error rate results. In the 5×5×3m indoor environment system, we get the signal-to-noise ratio (SNR) into the Joint PWM/PPM simulation to obtain the bit error rate distributions. It is known from the simulation results, that the system is added to the guard time of PPM signal, and the result of the bit error rate after the equalization is the best and the distribution is the most uniform.
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