Dynamic Pixel Compression Technique for QoS-Aware Video Processor

• Main Authors: CHANG,SHIH-WEI, 張世韋
• Other Authors: HUANG,CHUNG-HSUN
• Format: Others
• Language: zh-TW
• Published: 2017
• Online Access: http://ndltd.ncl.edu.tw/handle/2vz762

碩士 === 國立中正大學 === 電機工程研究所 === 106 === This thesis presents a predictive coding method based on Hierarchical Average and Copy Prediction (HACP) for the video processor which have been used in panel display systems. The method classify the prediction error using the concept of Turncated Bit Packing. For different graded prediction errors, uses different methods to lossy compress image data, and use the system information in the video processor to provide a way to adjust the image quality. In the U18 process 14.4528k gate count area, a 18.75% reduction in video processor memory capacity, and on the premise of no information of system objects added to the image test set of USC-SIPI, the average reduction of 57.79% of the image data and the PSNR of the restored images are both above 30 dB.