| Summary: | 碩士 === 中原大學 === 電子工程研究所 === 106 === In this thesis, an efficient hardware-oriented contrast enhancement algorithm is proposed. The proposed algorithm is based on the weighted filter and calculates the brightness values according to the adjustment of the image. After analyzing these brightness values, it is decided to reduce or increase the brightness values of the points. In order to improve the quality of the image, the algorithm was developed by a block-based method rather than a frame-based one. The proposed algorithm uses the different brightness values of each area in the image to adjust the brightness value of the pixel reduction or lifting point in each block to improve the contrast of the image. According to the simulation results, compared with the previous algorithms, this work not only improved the average of DE by 1%, but also increased the average of CEF by 8.5%. An electronic design automation tool called Synopsys Design Vision was used for chip realization. This design was implemented by using TSMC 0.18 μm CMOS cell library. The results in this thesis represent that the gate counts is 6,028. The frequency is 201-MHZ, and the power is 17.47-mW.
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