Low Power Match Line Design Used in Content Addressable Memory

博士 === 國立中興大學 === 資訊科學與工程學系 === 106 === Content-Addressable Memory (CAM) and Ternary Content-Addressable memory (TCAM) are often used in fast lookup applications. Because using parallel comparisons for fast searching, rsulting in high power consumption. In this paper we propose two ML designs to red...

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Bibliographic Details
Main Authors: Tung-Chi Wu, 吳桐其
Other Authors: 張延任
Format: Others
Language:zh-TW
Published: 2018
Online Access:http://ndltd.ncl.edu.tw/handle/3sp3x8
Description
Summary:博士 === 國立中興大學 === 資訊科學與工程學系 === 106 === Content-Addressable Memory (CAM) and Ternary Content-Addressable memory (TCAM) are often used in fast lookup applications. Because using parallel comparisons for fast searching, rsulting in high power consumption. In this paper we propose two ML designs to reduce the ML power consumption of the CAM and TCAM. For the CAM, we propose a new ML architecture, called MSML (Master-Slave Match Line) design, by combining the master-slave ML architecture and charge refill minimization technique to reduce the MLs power dissipated of the CAM. The MSML’s ML is composed of one master ML (MML), several slaves ML (SMLs) and one final ML (FML) to perform the search operation. By sharing the MML charge to the SML when mismatched search, our design can minimize the MML charge refill swing, such that the ML power consumption can be reduced effectively. The ML power saving is at least 50%, From the HSPICE simulation, the MSML desing can reduce the ML energy consumption by 7% to 57%. In addition, we further modify the CAM cell structure to improve the search performance of the CAM and called MSMLhp design. In the 128-bit configuration, the MSMLhp improves energy-delay product (EDP) by 28% over MSML design, and improves EDP by 69% compares with the traditional CAM designs. In addition, we propose the MAML (mask-aware match-line) technology for the TCAM ML design. Use the prefix don''t care continuity feature, MAML design divides the ML to several segments and adds a gate node(GN) between each ML. Avoiding the no need precharge of MLs to reduce power consumption. Due to the segmentation design, the voltage on the ML will be limited between 0~Vdd-Vtn. Compare with other related research, MAML design can reduce the power consumption effectively on the ML, and without adding many complicated control circuits. MAML uses TSMC''s 0.18um process with a capacity of 256*128-bit. The HSPICE simulation results show that the refined MAML design which reduced the ML energy consumption about 22% to 58% compared to the traditional design like NOR-Type TCAM.