| Summary: | 博士 === 國立暨南國際大學 === 電機工程學系 === 106 === A dry fingerprint will induce a smaller capacitance value than that of normal fingerprint, while a wet one will induce a larger value. Under various finger surface conditions, the induced capacitance will crowd to a smaller range when compared with the normal fingerprint condition, causing reduced dynamic range and lowered image quality. Hence, in this dissertation three sensing schemes of the readout circuit for capacitive fingerprint sensor chips are proposed for enhancing the quality of acquired image under various finger surface conditions.
The first proposed scheme is a sub-fF neighbor pixel difference sensing scheme employing the charge based capacitance measurement (CBCM) circuit. The proposed scheme employs a split differential structure between two neighbor sensing pixels to mitigate the parasitic effects. By sensing the tiny difference of the induced capacitance of two neighbor pixels, the edges of the ridge and valley of a fingerprint are captured. The sensed capacitance range is from 0aF to 500aF. The output dynamic range is from 0.61V to 1.22V. The power consumption is 284.28mW. The chip occupies an area of 1.207×1.220mm2 in UMC 0.18μm 1P6M CMOS process.
The second proposed scheme is a switching sensor capacitor scheme. By switching the variable gain of the output voltage against the induced fingerprint capacitance, the reduced output dynamic range can be extended to its normal value. Three switching sensor capacitor modes are designed for targeting the maximum induced capacitance of 78, 36.6 and 24 fF. The dynamic ranges are 0.731V, 0.687V, and 0.6V for the three modes. The improvements on dynamic range are 31.1% and 34% at mode2 and mode3, respectively. The power consumption is 1.734mW. The chip occupies an area of 1.142×0.987mm2 in UMC 0.18μm 1P6M CMOS process.
The third proposed scheme is a charge amplifier type fingerprint sensor with sliced sensing region scheme. By switching an offset capacitance to slice the whole sensing range of fingerprint induced capacitance make all the sensing ranges maintain the maximum dynamic range. The measured output dynamic range is 0.23-1.75V with induced capacitance range of 0-30fF at Mode1. The measured output dynamic range is 0.23-1.75V with induced capacitance range of 15-50fF at Mode2. The measured output dynamic range is 0.27-1.77V with induced capacitance range of 35-70fF at Mode3. The chip consumes 0.915mW and occupies an area of 0.330 × 7.996mm2 in TSMC 0.18μm 1P6M CMOS process.
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