Power-Efficient and Cost-Effective 2-D Symmetry Filter Architectures

博士 === 國立交通大學 === 資訊科學與工程研究所 === 106 === In this dissertation, two-dimensional (2-D) VLSI digital filter architectures possessing various symmetries in the filter magnitude response are studied for the first time. For this purpose, Type-1, Type-2, and Type-3 power-efficient and cost-effective 2-D ma...

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Main Authors: Chen, Pei-Yu, 陳姵妤
Other Authors: Van, Lan-Da
Format: Others
Language:en_US
Published: 2018
Online Access:http://ndltd.ncl.edu.tw/handle/c7uh73
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spelling ndltd-TW-106NCTU53941702019-05-16T01:40:47Z http://ndltd.ncl.edu.tw/handle/c7uh73 Power-Efficient and Cost-Effective 2-D Symmetry Filter Architectures 低功耗與低成本之二維對稱式濾波器架構設計實現 Chen, Pei-Yu 陳姵妤 博士 國立交通大學 資訊科學與工程研究所 106 In this dissertation, two-dimensional (2-D) VLSI digital filter architectures possessing various symmetries in the filter magnitude response are studied for the first time. For this purpose, Type-1, Type-2, and Type-3 power-efficient and cost-effective 2-D magnitude symmetry filter architectures possessing diagonal, four-fold rotational, quadrantal, and octagonal symmetries with reduced number of multipliers are given. For each Type (1-3), four structures incorporating each of the above symmetries are presented. In all 12 single symmetry structures are studied. Further, two power-efficient and cost-effective multimode 2-D symmetry filters are given. By combining the identities of four each of the Type-1 and Type-3 symmetry filter structures, the proposed Type-1 and Type-3 multimode 2-D symmetry filters can provide four different operation modes: diagonal symmetry mode (DSM), four-fold rotational symmetry mode (FRSM), quadrantal symmetry mode (QSM), and octagonal symmetry mode (OSM). Besides, the symmetry filter architectures using delta operator are also proposed for better numerical accuracy and lower coefficient sensitivity in narrow-band filter designs. According to ASIC implementation flow, Synopsys Design Compiler is employed to synthesize the Type-1 2-D filter designs in RTL level and Cadence SOC Encounter is adopted for placement and routing (P&R) in TSMC 0.18um. The power dissipation implementation result is measured via Synopsys PrimePower. The Type-1 diagonal, four-fold rotational, quadrantal, and octagonal symmetry filter structures can attain power savings of 16.77%, 36.30%, 22.90%, and 37.73% with respect to that of the conventional 2-D filter design without symmetry. On the other hand, the Type-1 DSM, FRSM, QSM, and OSM modes can reduce power consumption by 11.01%, 31.42%, 17.53%, and 35.26% compared with that of the conventional 2-D filter design. The Type-1 multimode filter can result in 63.25% area reduction compared with the sum of the areas of the four individual Type-1 symmetry filter structures. Besides, we also provide Type-2 and Type-3 symmetry filter architectures with different structures and shorter critical paths. Van, Lan-Da Reddy, Hari C. 范倫達 Hari C. Reddy 2018 學位論文 ; thesis 95 en_US
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description 博士 === 國立交通大學 === 資訊科學與工程研究所 === 106 === In this dissertation, two-dimensional (2-D) VLSI digital filter architectures possessing various symmetries in the filter magnitude response are studied for the first time. For this purpose, Type-1, Type-2, and Type-3 power-efficient and cost-effective 2-D magnitude symmetry filter architectures possessing diagonal, four-fold rotational, quadrantal, and octagonal symmetries with reduced number of multipliers are given. For each Type (1-3), four structures incorporating each of the above symmetries are presented. In all 12 single symmetry structures are studied. Further, two power-efficient and cost-effective multimode 2-D symmetry filters are given. By combining the identities of four each of the Type-1 and Type-3 symmetry filter structures, the proposed Type-1 and Type-3 multimode 2-D symmetry filters can provide four different operation modes: diagonal symmetry mode (DSM), four-fold rotational symmetry mode (FRSM), quadrantal symmetry mode (QSM), and octagonal symmetry mode (OSM). Besides, the symmetry filter architectures using delta operator are also proposed for better numerical accuracy and lower coefficient sensitivity in narrow-band filter designs. According to ASIC implementation flow, Synopsys Design Compiler is employed to synthesize the Type-1 2-D filter designs in RTL level and Cadence SOC Encounter is adopted for placement and routing (P&R) in TSMC 0.18um. The power dissipation implementation result is measured via Synopsys PrimePower. The Type-1 diagonal, four-fold rotational, quadrantal, and octagonal symmetry filter structures can attain power savings of 16.77%, 36.30%, 22.90%, and 37.73% with respect to that of the conventional 2-D filter design without symmetry. On the other hand, the Type-1 DSM, FRSM, QSM, and OSM modes can reduce power consumption by 11.01%, 31.42%, 17.53%, and 35.26% compared with that of the conventional 2-D filter design. The Type-1 multimode filter can result in 63.25% area reduction compared with the sum of the areas of the four individual Type-1 symmetry filter structures. Besides, we also provide Type-2 and Type-3 symmetry filter architectures with different structures and shorter critical paths.
author2 Van, Lan-Da
author_facet Van, Lan-Da
Chen, Pei-Yu
陳姵妤
author Chen, Pei-Yu
陳姵妤
spellingShingle Chen, Pei-Yu
陳姵妤
Power-Efficient and Cost-Effective 2-D Symmetry Filter Architectures
author_sort Chen, Pei-Yu
title Power-Efficient and Cost-Effective 2-D Symmetry Filter Architectures
title_short Power-Efficient and Cost-Effective 2-D Symmetry Filter Architectures
title_full Power-Efficient and Cost-Effective 2-D Symmetry Filter Architectures
title_fullStr Power-Efficient and Cost-Effective 2-D Symmetry Filter Architectures
title_full_unstemmed Power-Efficient and Cost-Effective 2-D Symmetry Filter Architectures
title_sort power-efficient and cost-effective 2-d symmetry filter architectures
publishDate 2018
url http://ndltd.ncl.edu.tw/handle/c7uh73
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