12-bit SAR ADC with Mixed Switching and Background Offset Calibration
碩士 === 國立交通大學 === 電機工程學系 === 106 === This thesis presents a 12-bit successive approximation register (SAR) analog-to-digital converter (ADC) with mixed switching and offset calibration in TSMC 0.18-µm process. To reduce the switching energy and save the total capacitance, a mixed switching procedure...
Main Authors: | , |
---|---|
Other Authors: | |
Format: | Others |
Language: | zh-TW |
Published: |
2017
|
Online Access: | http://ndltd.ncl.edu.tw/handle/ngq679 |