Ka-band Power Detectors for 5G Communication

• Main Authors: Yu-Ni Chen, 陳瑀妮
• Other Authors: 盧信嘉
• Format: Others
• Language: zh-TW
• Published: 2017
• Online Access: http://ndltd.ncl.edu.tw/handle/d3wt66

碩士 === 國立臺灣大學 === 電子工程學研究所 === 106 === This thesis studies power detectors, which operate in Ka-band for 5G communication and are proposed to enhance detection capability and verify the property of transmitter systems. First, this thesis reviews the architectures of different types of circuits related to power detectors, including detectors, low noise amplifiers and mixers. In addition, this study analyzes the operation principles as well as briefly introduces the functions and applications of the circuit design. Second, the thesis introduces different types of design methods of the common-source amplifier, the continuous variable gain amplifier, the digitally-controlled variable gain amplifier and the subharmonic down-convert mixer. This thesis first proposes a fixed gain common-source amplifier. With source degeneration techniques and cascade structure, it achieves high gain of 13.5 dB and low noise. Moreover, it is also integrated with a self-mixing rectifier and an operational amplifier to form a detector with minimum detectable power of -38 dBm. Its DC voltage output range is from 125 mV to 720 mV and power consumption is 31.5 mW. In order to increase its detectable range, we also redesigned a continuous variable gain amplifier. With the increase of gain, smaller power is detectable, and the amplifier consumes only 9 mW power. The second version of VGLNA introduces a digitally-controlled three state variable gain amplifier and applies current-reused technique to reduce noise as well as to enhance gain. Besides, a Dicke switch is also integrated to average and cancel out the flicker noise of transistors, and the design achieves 19 dB gain with noise figure at only 6.3 dB (with switch). On the other hand, to simplify detection and increase dynamic range, this study also proposes a subharmonic down-convert mixer, which realizes 2LO to RF isolation of nearly 60 dB and IP1dB at -3 dBm with transformer. In this thesis, the proposed circuits were designed by using ADS and Sonnet for the circuit and EM simulation. The four circuits were: an LNA implemented by TSMC 180 nm CMOS, a continuous VGLNA, a digitally-controlled VGLNA and a subharmonic mixer in CMOS technology 90 nm. The measurement results almost fit the simulation and discussions are given in Chapter 4.