GaN Voltage-controlled Oscillator and Divide-by 2 Injection-Locked Frequency Divider

碩士 === 國立臺灣科技大學 === 電子工程系 === 106 === First, a high-performance wide locking range divide-by-2 injection-locked frequency divider (ILFD) in the 0.18 μm CMOS process is presented.The ILFD consists of two sub-ILFDs. The first sub-ILFD uses a dual-resonance resistively distributed resonator, and the 2...

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Bibliographic Details
Main Authors: Bi-Sheng Shih, 施筆生
Other Authors: Sheng-Lyang Jang
Format: Others
Language:zh-TW
Published: 2018
Online Access:http://ndltd.ncl.edu.tw/handle/ykgzy5
Description
Summary:碩士 === 國立臺灣科技大學 === 電子工程系 === 106 === First, a high-performance wide locking range divide-by-2 injection-locked frequency divider (ILFD) in the 0.18 μm CMOS process is presented.The ILFD consists of two sub-ILFDs. The first sub-ILFD uses a dual-resonance resistively distributed resonator, and the 2nd ILFD uses a single-resonance LC resonator. The two sub-ILFDs use two transformers to inductively couple each other so that the ILFD becomes a triple-resonance ILFD having three frequency bands around 3.8 GHz, 3.4 GHz and 2.6 GHz by tuning the varactor capacitance. At low injection power, the ILFD has three locking ranges associated with the oscillation frequency bands. At injection power of 0 dBm, overlapped locking range associated with high-band and low-band resonant frequencies are found. Secondly, a transformer-based divide-by-2 injection-locked frequency divider (ILFD) is presented. The ILFD is a combination of a single-resonance ILFD and a dual-resonance ILFD by sharing a common magnetic field and was implemented in the TSMC 0.18 μm BiCMOS process and it has three fresh frequency bands. High-voltage was applied to the supply, this generate high ac and dc stress to the circuit, and the shrinkage of locking range and the drift of free-running ILFD oscillation frequency with stress time were found. Thirdly, a push-push GaN HEMT oscillator is presented, The proposed oscillators have been implemented with the WIN 0.25 μm GaN HEMT technology. The oscillator consists of two HEMT amplifiers with cross-coupled feedback, the output is tapped from the common node of two amplifiers. With the supply voltage of VDD = 0.9 V, the GaN VCO current and power consumption of the oscillator are 87 mA and 78.3mW, respectively. The oscillator can generate single-ended signal at 8.7 GHz and it also supplies output power -7.49 dBm. At 1MHz frequency offset from the carrier the phase noise is -122.191 dBc/Hz. The die area of the GaN HEMT oscillator is 2×1 〖mm〗^2. Fourthly, a GaN HEMT divide-by-2 injection-locked frequency divider (ILFD) with the tail injection method is presented. The proposed ILFD has been implemented with the WIN 0.25 μm GaN HEMT technology. The ILFD consists of a capacitive cross-coupled HEMT pair and an LC-tank. The free-running oscillation of the ILFD is around 3.28 GHz. At the ILFD-core supply 0.7 V, the locking range is 0.19 GHz from 6.47 GHz to 6.66 GHz, the output power from the ILFD core is -2.94 dBm. The die area of the tail-injection GaN HEMT ILFD is 2×1 〖mm〗^2. Fifthly, a low-phase noise 8.22 GHz GaN HEMT oscillator in the WIN 0.25 μm GaN HEMT process is presented. The oscillator uses a HEMT amplifier with a transformer as the feedback network. The transformer uses a 3-path secondary and a single-path primary. The GaN oscillator consumes the power 4.328 mW and generates a signal at 8.22 GHz with an output power -11.35 dBm. At 1MHz frequency offset from the carrier at 8.22 GHz the phase noise is -120.82 dBc/Hz, the FoM of the proposed oscillator is -192.76 dBc/Hz. The oscillator chip occupies an area of 2×1 〖mm〗^2. Finally, a low-phase noise 9.2 GHz GaN HEMT oscillator in the WIN 0.25 μm GaN HEMT process. The oscillator uses a HEMT amplifier with a series LC circuit as the feedback network. With the supply voltage of VDD = 0.85 V, the GaN oscillator consumes the power 4.335 mW. The single-ended oscillator generates a signal at 9.23 GHz with an output power -3.18 dBm. At 1MHz frequency offset from the carrier at 9.23 GHz the phase noise is -128.08 dBc/Hz, the FoM of the proposed oscillator is -200.998 dBc/Hz. The chip occupied area of the GaN oscillator is 2×1 〖mm〗^2.