Study and Implementation of Power Converter with Digital-Controlled Compensation Loop
碩士 === 國立臺灣科技大學 === 電機工程系 === 106 === A power converter with digital-controlled compensation loop is developed and implemented in this thesis. The proposed topology is composed of an interleaved power factor corrector and a full-bridge phase-shift converter. The proposed system not only increases th...
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ndltd-TW-106NTUS54421412019-05-16T00:59:41Z http://ndltd.ncl.edu.tw/handle/3y2k8b Study and Implementation of Power Converter with Digital-Controlled Compensation Loop 具數位控制補償迴路之電源轉換器研製 Jyun-Jie Yang 楊鈞傑 碩士 國立臺灣科技大學 電機工程系 106 A power converter with digital-controlled compensation loop is developed and implemented in this thesis. The proposed topology is composed of an interleaved power factor corrector and a full-bridge phase-shift converter. The proposed system not only increases the power factor of the system to nearly 1.0, but also determines the power converter’s mode according to the voltage of the electronic load. Secondly, the operating principle of the system, and the respective control modes are analyzed, the design criteria of the related system parameters are also completely described. Furthermore, both the average switching model and the duty cycle loss factor are used to derive the small signal model of the phase-shift full-bridge converter, and the model obtains the transfer function of the output voltage and current to the duty cycle to design the digital compensation control loop to complete the digital control, and then the Matlab software is used to simulate the system’s frequency response. In addition, the proposed system is based on TI's DSP TMS320F28035 as the controller to implement the digital compensation control loop design. Finally, the system achieves a 1 kW power converter, and the feasibility is verified by experimental results. Chang-Hua Lin 林長華 2018 學位論文 ; thesis 132 zh-TW |
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碩士 === 國立臺灣科技大學 === 電機工程系 === 106 === A power converter with digital-controlled compensation loop is developed and implemented in this thesis. The proposed topology is composed of an interleaved power factor corrector and a full-bridge phase-shift converter. The proposed system not only increases the power factor of the system to nearly 1.0, but also determines the power converter’s mode according to the voltage of the electronic load. Secondly, the operating principle of the system, and the respective control modes are analyzed, the design criteria of the related system parameters are also completely described. Furthermore, both the average switching model and the duty cycle loss factor are used to derive the small signal model of the phase-shift full-bridge converter, and the model obtains the transfer function of the output voltage and current to the duty cycle to design the digital compensation control loop to complete the digital control, and then the Matlab software is used to simulate the system’s frequency response. In addition, the proposed system is based on TI's DSP TMS320F28035 as the controller to implement the digital compensation control loop design. Finally, the system achieves a 1 kW power converter, and the feasibility is verified by experimental results.
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author2 |
Chang-Hua Lin |
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Chang-Hua Lin Jyun-Jie Yang 楊鈞傑 |
author |
Jyun-Jie Yang 楊鈞傑 |
spellingShingle |
Jyun-Jie Yang 楊鈞傑 Study and Implementation of Power Converter with Digital-Controlled Compensation Loop |
author_sort |
Jyun-Jie Yang |
title |
Study and Implementation of Power Converter with Digital-Controlled Compensation Loop |
title_short |
Study and Implementation of Power Converter with Digital-Controlled Compensation Loop |
title_full |
Study and Implementation of Power Converter with Digital-Controlled Compensation Loop |
title_fullStr |
Study and Implementation of Power Converter with Digital-Controlled Compensation Loop |
title_full_unstemmed |
Study and Implementation of Power Converter with Digital-Controlled Compensation Loop |
title_sort |
study and implementation of power converter with digital-controlled compensation loop |
publishDate |
2018 |
url |
http://ndltd.ncl.edu.tw/handle/3y2k8b |
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