Digital Variable-Frequency Adjustable DPWM Converter Chip Design Based on ARM Control

• Main Authors: CHANG, LI-HUNG, 張歷弘
• Other Authors: SHEU, MING-HWA
• Format: Others
• Language: zh-TW
• Published: 2018
• Online Access: http://ndltd.ncl.edu.tw/handle/9p4h52

碩士 === 國立雲林科技大學 === 電子工程系 === 106 === This thesis is an FPGA ARM controlled digital variable frequency adjustable DPWM converter is proposed, which is implemented using the TSMC 0.25 μm CMOS High Voltage Mixed Signal (T25) process. This ARM variable frequency system automatically detects the optimum frequency required by the load for optimum converter efficiency. This automatical frequency detection is designed by Keil C, and then it is compiled into mechanical code and installed in FPGA chip for ARM IP execution. Next, we use FPGA and discrete components, such as power MOS, ADC, L and C etc, to implement a prototype system. After testing to meet the system specifications, the digital-circuit part is synthesized by cell-based layout design, and the analog-circuit part is designed by full-custom layout design. Then, both layout designs are integrated and simulation by SoC Encounter and Nanosim tools respectively. This chip will be fabricated by the National Chip Implementation Center at TSMC to complete the digital-controlled variable-frequency DPWM converter chip design based on ARM control. The design concept is first realized by electronic components. The circuit efficiency of the prototype is up to 93.86%, the input voltage is 30V~50V, the output current is 500mA, and the output voltage is 20V~40V.