| Summary: | 碩士 === 國立中正大學 === 通訊工程研究所 === 107 === The filter-bank multi-carrier (FBMC) waveform is of higher spectrum efficiency than the conventional cyclic prefix orthogonal frequency multiplexing (CP-OFDM) waveform, due to its better out-of-band rejection capability. To properly control the overlapping adjacent subcarriers, the FBMC waveform is used with the offset quaternary amplitude modulated (O-QAM) signaling to maintain time and frequency orthogonality. In this thesis, the FBMC system is simulated under different scenarios. The architecture of the FBMC system transceiver is designed by Simulink. Then hardware description language (HDL) coder is used to convert the designed architecture to (HDL) code, which is then downloaded to Zedboard FPGA for fast prototyping. Finally, for ASIC hardware implementation, the HDL code is synthesized by Synopsys Design Compiler the under TSMC 90nm CMOS technology.
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