Fabrication and optimization of passive-matrix red micro-LED displays

碩士 === 國立中興大學 === 材料科學與工程學系所 === 107 === In this thesis, we have develop a passive-matrix red-light micro-LED display with 64 × 32 pixels, where the pixels size are 100 μm × 100 μm and the pixels pitch are 175 μm and 176.9 μm. A double-side polished sapphire substrate is employed to replace the orig...

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Bibliographic Details
Main Authors: Yu-Shiuan Yao, 姚宇軒
Other Authors: 武東星
Format: Others
Language:zh-TW
Published: 2019
Online Access:http://ndltd.ncl.edu.tw/cgi-bin/gs32/gsweb.cgi/login?o=dnclcdr&s=id=%22107NCHU5159055%22.&searchmode=basic
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Summary:碩士 === 國立中興大學 === 材料科學與工程學系所 === 107 === In this thesis, we have develop a passive-matrix red-light micro-LED display with 64 × 32 pixels, where the pixels size are 100 μm × 100 μm and the pixels pitch are 175 μm and 176.9 μm. A double-side polished sapphire substrate is employed to replace the original GaAs substrate by a epilayer transfer technique and acts as the emitting side. High-transparency indium-tin-oxide (ITO) is utilized as the p electrode to avoid the emitting photon shielded by metal electrodes. Each pixel on matrix display is controlled through addressable p-electrode and n-electrode array network. For the display operation, the micro-LED array chip was first bonded to integrated circuit by using the anisotropic conductive glue and then soldering on the printed circuit board. Therefore, the passive-matrix red-light micro-LED display can then be operated. It is well known that the high density plasma etching process will damage the sidewall of LED chip and induced surface states. This continuously surface states may provide a path for electrons and holes flow from the output circuit, reducing the probability of radiative recombination in quantum wells. To overcome this issue, the micro-LED chip sidewall surface was coated with a silicon dioxide film due to its excellent surface passivation capability. Furthermore, to improve the device opto-electrical uniformity, a Cr/Au stack film was evaporated on the ITO electrode to alleviate the series resistance difference in terms of the pixels’ position. Under an injection current of 1 mA, the micro-LED structure with the Cr/Au metallic stack exhibits only 4.0% (24.5% for reference) variation in forward voltage for the micro-LED chips from 1st row to 32th row. The result indicates that the Cr/Au stack evaporated on ITO can improve the uniformity of forward voltage of micro-LED chips. Based on the Cr/Au investigation results, the SiO2 passivation layer was deposited over the micro-LED structure. The micro-LED sidewall with the SiO2 passivation exhibits leakage current reduction from 3 nA to 1.5 nA which were extracted from the -5 V bias voltage. The results clearly show less current flow through LED via surface state whereas more current flow into the quantum well. Therefore, the output power and the maximum external quantum efficiency of micro-LED with passivation layer exhibits significantly improvement from 440 to 513 μW (@ 3 mA) and from 8.45 to 9.91% (@ 0.1 mA), respectively.