An 8-bit 1.6-GS/s Flash-SAR Time-Interleaved ADC with Background Offset Calibration
碩士 === 國立成功大學 === 電機工程學系 === 107
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Online Access: | http://ndltd.ncl.edu.tw/handle/x6agxt |
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ndltd-TW-107NCKU54420542019-10-26T06:24:11Z http://ndltd.ncl.edu.tw/handle/x6agxt An 8-bit 1.6-GS/s Flash-SAR Time-Interleaved ADC with Background Offset Calibration 一個擁有偏移背景校正之八位元每秒取樣十六億次的快閃與逐漸趨近式時間交錯型類比數位轉換器 Yi-ShenCheng 鄭乙申 碩士 國立成功大學 電機工程學系 107 Soon-Jyh Chang 張順志 2019 學位論文 ; thesis 135 en_US |
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en_US |
format |
Others
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NDLTD |
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碩士 === 國立成功大學 === 電機工程學系 === 107 |
author2 |
Soon-Jyh Chang |
author_facet |
Soon-Jyh Chang Yi-ShenCheng 鄭乙申 |
author |
Yi-ShenCheng 鄭乙申 |
spellingShingle |
Yi-ShenCheng 鄭乙申 An 8-bit 1.6-GS/s Flash-SAR Time-Interleaved ADC with Background Offset Calibration |
author_sort |
Yi-ShenCheng |
title |
An 8-bit 1.6-GS/s Flash-SAR Time-Interleaved ADC with Background Offset Calibration |
title_short |
An 8-bit 1.6-GS/s Flash-SAR Time-Interleaved ADC with Background Offset Calibration |
title_full |
An 8-bit 1.6-GS/s Flash-SAR Time-Interleaved ADC with Background Offset Calibration |
title_fullStr |
An 8-bit 1.6-GS/s Flash-SAR Time-Interleaved ADC with Background Offset Calibration |
title_full_unstemmed |
An 8-bit 1.6-GS/s Flash-SAR Time-Interleaved ADC with Background Offset Calibration |
title_sort |
8-bit 1.6-gs/s flash-sar time-interleaved adc with background offset calibration |
publishDate |
2019 |
url |
http://ndltd.ncl.edu.tw/handle/x6agxt |
work_keys_str_mv |
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