Automate and Accelerate RISC-V Processor Verification by Compositional Formal Method

Automate and Accelerate RISC-V Processor Verification by Compositional Formal Method

碩士 === 國立成功大學 === 電機工程學系 === 107

Bibliographic Details
Main Authors: Cheng-TingKao, 高振庭
Other Authors: Yean-Ru Chen
Format: Others
Language:zh-TW
Published: 2019
Online Access:http://ndltd.ncl.edu.tw/handle/zg7993
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spelling ndltd-TW-107NCKU54422012019-10-26T06:24:19Z http://ndltd.ncl.edu.tw/handle/zg7993 Automate and Accelerate RISC-V Processor Verification by Compositional Formal Method 以組合式的正規方法自動並加速RISC-V處理器驗證 Cheng-TingKao 高振庭 碩士 國立成功大學 電機工程學系 107 Yean-Ru Chen 陳盈如 2019 學位論文 ; thesis 94 zh-TW
collection NDLTD
language zh-TW
format Others
sources NDLTD
description 碩士 === 國立成功大學 === 電機工程學系 === 107
author2 Yean-Ru Chen
author_facet Yean-Ru Chen
Cheng-TingKao
高振庭
author Cheng-TingKao
高振庭
spellingShingle Cheng-TingKao
高振庭
Automate and Accelerate RISC-V Processor Verification by Compositional Formal Method
author_sort Cheng-TingKao
title Automate and Accelerate RISC-V Processor Verification by Compositional Formal Method
title_short Automate and Accelerate RISC-V Processor Verification by Compositional Formal Method
title_full Automate and Accelerate RISC-V Processor Verification by Compositional Formal Method
title_fullStr Automate and Accelerate RISC-V Processor Verification by Compositional Formal Method
title_full_unstemmed Automate and Accelerate RISC-V Processor Verification by Compositional Formal Method
title_sort automate and accelerate risc-v processor verification by compositional formal method
publishDate 2019
url http://ndltd.ncl.edu.tw/handle/zg7993
work_keys_str_mv AT chengtingkao automateandaccelerateriscvprocessorverificationbycompositionalformalmethod
AT gāozhèntíng automateandaccelerateriscvprocessorverificationbycompositionalformalmethod
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AT gāozhèntíng yǐzǔhéshìdezhèngguīfāngfǎzìdòngbìngjiāsùriscvchùlǐqìyànzhèng
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