| Summary: | 碩士 === 國立臺灣科技大學 === 電子工程系 === 107 === Since the semiconductor technology has improved rapidly over the past few decades, the capacity of current flash memory chip is much larger than before. Solid-state drives (SSDs) based on the flash memory chip has become an alternative to traditional hard-disk drives (HDDs) because of their lower price. Compared with the traditional HDDs, SSDs have the advantages of low-power consumption, fast-access speed, small size, shock resistance. However, due to the internal structure of the underlying flash memory chip, it retains many disadvantages, such as out-of-place update, asymmetric access units for programing and erasing, limited program/erase cycles. To solve or alleviate the above problems caused by the characteristics of underlying flash memory chips in the SSDs, a portion of the DRAM is typically used as a write cache to improve the performance and the lifetime of flash memory by absorbing large amounts of data updates from the file system. In this thesis, we propose a novel write cache management. The core idea is to select the victim page that is suitable for being removed from the cache according to the expected update interval. Overall, the experimental results show that the hit ratio of our method has approximate 25.8%, 14.54%, 13.01% improvement compared with the existing cache management methods such as LRU, PRLRU, and VBBMS.
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