28/38 GHz dual mode frequency synthesizer

• Main Authors: Yen-Ting Chiang, 江衍霆
• Other Authors: Hsiao-Chin Chen
• Format: Others
• Language: en_US
• Published: 2019
• Online Access: http://ndltd.ncl.edu.tw/handle/xn7pyx

碩士 === 國立臺灣科技大學 === 電機工程系 === 107 === A 28/38 GHz dual-band frequency synthesizer for 5th generation mobile communication is implemented using TSMC 90-nm CMOS technology. The on-chip VCO achieves the tuning range from 23.5 GHz to 28 GHz, and exhibits the phase noise of -105.57 dBc/Hz~ -107.08 dBc/Hz at 1 MHz offset, from the 23.5 GHz~28 GHz carriers. With dividers and mixers, the 28/38 GHz carrier is synthesized from the VCO output signal in two operation modes, where the synthesizer dissipates 143.16 mW at 28 GHz band with the resolution of 281.25 MHz and the in-band phase noise is -75.57 dBc/Hz ~-81.38 dBc/Hz @ 100 kHz offset, the out-band phase noise is -93.27 dBc/Hz ~-106.32 dBc/Hz @ 10 MHz offset, and 129.64 mW at 38 GHz band with the resolution of 375 MHz and the in-band phase noise is -77.11 dBc/Hz ~-84.75 dBc/Hz @ 100 kHz offset, the out-band phase noise is -98.34 dBc/Hz ~-105.29 dBc/Hz @ 10 MHz offset. The sideband rejection ratio is 17.8 dB ~ 39.73 dB. The LO leakage rejection ratio is 6.07 dB ~ 56.47 dB. The locking time is 4~6 μs. The chip area is 2.154 mm2.