Comparison of PWM Techniques for 3-Phase Inverters Connected in Parallel

• Main Authors: TEH, WEE KIAT, 鄭偉傑
• Other Authors: LAI, YEN-SHIN
• Format: Others
• Language: zh-TW
• Published: 2019
• Online Access: http://ndltd.ncl.edu.tw/handle/ebzvxd

碩士 === 國立臺北科技大學 === 電機工程系電力電子產業碩士專班 === 107 === The objective of this thesis is to compare the pros and cons of synchronous SVPWM, interleaved SVPWM, time-segment exchange TPWM and interleaved NSVM for paralleled three-phase inverters.The interleaved NSVM is developed based on the existing literature NSVM3 method with interleaving strategy to reduce total harmonic distortion and common mode voltage, improve zero-sequence circulation current. The experimental system consists of two three-phase DC/AC inverters, coupled inductors and loads. In this thesis, Renesas produced Micro Controller Unit (MCU) 32-bit SH7137 is used as the control platform to verify whether the PWM switching method is correct in implementation and analysis. The experimental plattform for driving R-L loads with specifications includeing input DC voltage of 148V, switching frequency 15 kHz, and the three-phase star connection R-L loads is 36Ω5mH. When driving the induction motor, the supply DC voltage is modified to 226.3V in accordance with the rated voltage of the motor. Simulation and experimental results show synchonous SVPWM has the advantages of low circulating current and high efficiency. The three interleaved PWMs have the advantages of low common mode voltage and low ouput current total harmonic distortion. The zero-sequential circulating current interleaved NSVM can be reduced by more than half in the low modulation index as compared to interleaved SVPWM.