Summary: | 碩士 === 國立雲林科技大學 === 電機工程系 === 107 === This thesis mainly analyzes the performance of successive cancellation list (SCL) decoder and CRC aided-successive cancellation list (CA-SCL) decoder for polar code.,SCL decoder can be considered as the improved version of a successive cancellation (SC) decoder. Since SC decoder requires the estimate of previous information bits when dealing with current ones, serious error propagation will occur under erroneous decision. SCL decoder has been focused on the improvement on the drawbacks of SC. Besides the operations carried out in SC decoder, SCL calculates the path metrics in addition, and reserves candidate paths according the list size parameters to compute the final optimal decoding output. In another improved version called CRC-aided SCL (CA-SCL), bit error rate can be further suppressed by appending cyclic redundancy check (CRC) bits to SCL blocks.
In this thesis, the bit error rate (BER) and frame error rate (FER) of SC, SCL, and CA-SCL decoders are simulated and compared. We especially focus on the investigation of two important parameters, namely, the list size in SCL decoder and the CRC size in CA-SCL decoder. The performance analyses for the three decoders are presented in this thesis. And their coding gains over uncoded binary phase-shift keying (BPSK) transmission system are also summarized. Simulation results show that CA-SCL decoder can effectively overcome the drawback of SC decoder.
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