| Summary: | The MANY (Many-core programming and resource management for high-performance embedded systems) project aims at providing the industry with tools for developing software on multi- and many-core. This thesis makes its first contribution to the project through an investigation of power management techniques for processors with more than one core. The TILEPro64 processor from Tilera is used as a premiss of discussion, and its network-on-chip architecture is also considered. A prototype implementation of a task mapping algorithm shows promising results for threads communicating between cores over the TILEPro64 on-chip networks. Traditional processor scheduling is introduced followed by an analysis of different power-aware multi-core scheduling algorithms. In a previous thesis project, a port of the real-time operating system Enea OSE to the TILEPro64 was started. A second part of this thesis continues this work, with development on the hardware abstraction layer and board support package.
|
|---|
