Architectures for Multiplication in Galois Rings

Architectures for Multiplication in Galois Rings

This thesis investigates architectures for multiplying elements in Galois rings of the size 4^m, where m is an integer. The main question is whether known architectures for multiplying in Galois fields can be used for Galois rings also, with small modifications, and the answer to that question is t...

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Bibliographic Details
Main Author: Abrahamsson, Björn
Format: Others
Language:English
Published: Linköpings universitet, Institutionen för systemteknik 2004
Subjects:
Datorteknik
Galois ring
VLSI multiplication
Quaternary codes
Normal basis
Dual basis
Computer Engineering
Online Access:http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-2396
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spelling ndltd-UPSALLA1-oai-DiVA.org-liu-23962018-01-14T05:13:40ZArchitectures for Multiplication in Galois RingsengArkitekturer för multiplikation i Galois-ringarAbrahamsson, BjörnLinköpings universitet, Institutionen för systemteknikInstitutionen för systemteknik2004DatorteknikGalois ringVLSI multiplicationQuaternary codesNormal basisDual basisDatorteknikComputer EngineeringDatorteknikThis thesis investigates architectures for multiplying elements in Galois rings of the size 4^m, where m is an integer. The main question is whether known architectures for multiplying in Galois fields can be used for Galois rings also, with small modifications, and the answer to that question is that they can. Different representations for elements in Galois rings are also explored, and the performance of multipliers for the different representations is investigated. Student thesisinfo:eu-repo/semantics/bachelorThesistexthttp://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-2396LiTH-ISY-Ex, ; 3549application/pdfinfo:eu-repo/semantics/openAccess
collection NDLTD
language English
format Others
sources NDLTD
topic Datorteknik
Galois ring
VLSI multiplication
Quaternary codes
Normal basis
Dual basis
Datorteknik
Computer Engineering
Datorteknik
spellingShingle Datorteknik
Galois ring
VLSI multiplication
Quaternary codes
Normal basis
Dual basis
Datorteknik
Computer Engineering
Datorteknik
Abrahamsson, Björn
Architectures for Multiplication in Galois Rings
description This thesis investigates architectures for multiplying elements in Galois rings of the size 4^m, where m is an integer. The main question is whether known architectures for multiplying in Galois fields can be used for Galois rings also, with small modifications, and the answer to that question is that they can. Different representations for elements in Galois rings are also explored, and the performance of multipliers for the different representations is investigated.
author Abrahamsson, Björn
author_facet Abrahamsson, Björn
author_sort Abrahamsson, Björn
title Architectures for Multiplication in Galois Rings
title_short Architectures for Multiplication in Galois Rings
title_full Architectures for Multiplication in Galois Rings
title_fullStr Architectures for Multiplication in Galois Rings
title_full_unstemmed Architectures for Multiplication in Galois Rings
title_sort architectures for multiplication in galois rings
publisher Linköpings universitet, Institutionen för systemteknik
publishDate 2004
url http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-2396
work_keys_str_mv AT abrahamssonbjorn architecturesformultiplicationingaloisrings
AT abrahamssonbjorn arkitekturerformultiplikationigaloisringar
_version_ 1718610714502889472

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