Summary: | Video decoding technologies have been widely used in our daily life. Higherresolutions and more advanced coding technologies may promote the capabilitiesof video decoding. A new multi-core digital signal processing processor, ePUMA,which stands for embedded Parallel DSP platform with Unique Memory Access,is chosen to investigate how it supports video decoding. This thesis aims to benchmark the algorithms of video decoding and evaluatethe performance using ePUMA in MPEG-2 standard, which is a common standardwith the purpose of compressing video signals. Based on the slice-parallelismmethodology on eight co-processors of ePUMA, the implementation of the algorithemsconsists of variable length decoding, inverse scan, inverse quantization,two-dimensional inverse discrete cosine transform, motion vector decoding, formprediction and motion compensation. The performance of the kernels is benchmarkedby ePUMA system simulator. The result shows that to decode real-timeFull HD (1920*1080 pixels, 30 frames per second) video, it will require ePUMA torun at 280 MHz for I frames and at 320MHz for P frames.
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