Test Scheduling with Power and Resource Constraints for IEEE P1687
IEEE P1687 (IJTAG) is proposed to add more exibility|compared with IEEE 1149.1 JTAG|for accessing on-chip embedded test features called instruments. This exibility makes it possible to include and exclude instruments from the scan path. To reach a minimal test time, all instruments should be accesse...
Main Author: | Asani, Golnaz |
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Format: | Others |
Language: | English |
Published: |
Linköpings universitet, Institutionen för datavetenskap
2012
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Subjects: | |
Online Access: | http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-81472 |
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