Revamping Timing Error Resilience to Tackle Choke Points at NTC

Revamping Timing Error Resilience to Tackle Choke Points at NTC

The growing market of portable devices and smart wearables has contributed to innovation and development of systems with longer battery-life. While Near Threshold Computing (NTC) systems address the need for longer battery-life, they have certain limitations. NTC systems are prone to be significantl...

Full description

Bibliographic Details
Main Author: Bal, Aatreyi
Format: Others
Published: DigitalCommons@USU 2019
Subjects:
VLSI
Low power computing
Timing error
Choke points
Reliability
Electrical and Computer Engineering
Online Access:https://digitalcommons.usu.edu/etd/7456
https://digitalcommons.usu.edu/cgi/viewcontent.cgi?article=8576&context=etd
id ndltd-UTAHS-oai-digitalcommons.usu.edu-etd-8576
record_format oai_dc
spelling ndltd-UTAHS-oai-digitalcommons.usu.edu-etd-85762019-10-13T05:45:46Z Revamping Timing Error Resilience to Tackle Choke Points at NTC Bal, Aatreyi The growing market of portable devices and smart wearables has contributed to innovation and development of systems with longer battery-life. While Near Threshold Computing (NTC) systems address the need for longer battery-life, they have certain limitations. NTC systems are prone to be significantly affected by variations in the fabrication process, commonly called process variation (PV). This dissertation explores an intriguing effect of PV, called choke points. Choke points are especially important due to their multifarious influence on the functional correctness of an NTC system. This work shows why novel research is required in this direction and proposes two techniques to resolve the problems created by choke points, while maintaining the reduced power needs. 2019-05-01T07:00:00Z text application/pdf https://digitalcommons.usu.edu/etd/7456 https://digitalcommons.usu.edu/cgi/viewcontent.cgi?article=8576&context=etd Copyright for this work is held by the author. Transmission or reproduction of materials protected by copyright beyond that allowed by fair use requires the written permission of the copyright owners. Works not in the public domain cannot be commercially exploited without permission of the copyright owner. Responsibility for any use rests exclusively with the user. For more information contact digitalcommons@usu.edu. All Graduate Theses and Dissertations DigitalCommons@USU VLSI Low power computing Timing error Choke points Reliability Electrical and Computer Engineering
collection NDLTD
format Others
sources NDLTD
topic VLSI
Low power computing
Timing error
Choke points
Reliability
Electrical and Computer Engineering
spellingShingle VLSI
Low power computing
Timing error
Choke points
Reliability
Electrical and Computer Engineering
Bal, Aatreyi
Revamping Timing Error Resilience to Tackle Choke Points at NTC
description The growing market of portable devices and smart wearables has contributed to innovation and development of systems with longer battery-life. While Near Threshold Computing (NTC) systems address the need for longer battery-life, they have certain limitations. NTC systems are prone to be significantly affected by variations in the fabrication process, commonly called process variation (PV). This dissertation explores an intriguing effect of PV, called choke points. Choke points are especially important due to their multifarious influence on the functional correctness of an NTC system. This work shows why novel research is required in this direction and proposes two techniques to resolve the problems created by choke points, while maintaining the reduced power needs.
author Bal, Aatreyi
author_facet Bal, Aatreyi
author_sort Bal, Aatreyi
title Revamping Timing Error Resilience to Tackle Choke Points at NTC
title_short Revamping Timing Error Resilience to Tackle Choke Points at NTC
title_full Revamping Timing Error Resilience to Tackle Choke Points at NTC
title_fullStr Revamping Timing Error Resilience to Tackle Choke Points at NTC
title_full_unstemmed Revamping Timing Error Resilience to Tackle Choke Points at NTC
title_sort revamping timing error resilience to tackle choke points at ntc
publisher DigitalCommons@USU
publishDate 2019
url https://digitalcommons.usu.edu/etd/7456
https://digitalcommons.usu.edu/cgi/viewcontent.cgi?article=8576&context=etd
work_keys_str_mv AT balaatreyi revampingtimingerrorresiliencetotacklechokepointsatntc
_version_ 1719266641702813696

Similar Items