Dynamic Module Library Generation for FPGA-based Run-Time Reconfigurable Systems

Dynamic Module Library Generation for FPGA-based Run-Time Reconfigurable Systems

Modern Field Programmable Gate Arrays (FPGAs) can implement entire run-time reconfigurable systems using partial reconfiguration. Module-based run-time reconfiguration permits the construction of custom applications at run-time using pre-compiled Intellectual Property (IP) from a module library. The...

Full description

Bibliographic Details
Main Author:	Bowen, John Kipp
Other Authors:	Electrical and Computer Engineering
Format:	Others
Published:	Virginia Tech 2014
Subjects:	Partial Reconfiguration FPGA Run-time Reconfiguration Module Library
Online Access:	http://hdl.handle.net/10919/31088 http://scholar.lib.vt.edu/theses/available/etd-01312008-141152/

Similar Items

Dynamic Partial Reconfigurable FPGA
by: Zhou, Ruoxing
Published: (2011)

Evaluation of partial reconfiguration for FPGA debugging
by: Siverskog, Jacob
Published: (2010)

Adaptive Computing based on FPGA Run-time Reconfigurability
by: Liu, Ming
Published: (2011)

Design of an Adaptable Run-Time Reconfigurable Software-Defined Radio Processing Architecture
by: Templin, Joshua R.
Published: (2010)

Run-Time Reconfigurable FFT Engine
by: Ahmad F. Al-Allaf, et al.
Published: (2010-03-01)

Architecture-Independent Design for Run-Time Reconfigurable Custom Computing Machines
by: Hudson, Rhett Daniel
Published: (2014)

Framework for a Context-Switching Run-Time Reconfigurable System
by: Lehn, David Ilan
Published: (2014)

An Integrated Approach and Tool Support for the Design of FPGA-Based Multi-Grain Reconfigurable Systems
by: Rafael Zamacola, et al.
Published: (2020-01-01)

An FPGA-based Run-time Reconfigurable 2-D Discrete Wavelet Transform Core
by: Ballagh, Jonathan Bartlett
Published: (2014)

Implementation of Logic Fault Tolerance on a Dynamically Reconfigurable FPGA
by: Jayarama, Kiran
Published: (2016)

A Dynamic Reconfigurable Architecture for Hybrid Spiking and Convolutional FPGA-Based Neural Network Designs
by: Hasan Irmak, et al.
Published: (2021-08-01)

NovaCORE vFPGA: Virtualisation and Immediate Reconfiguration
by: PERINA, A. B., et al.
Published: (2017-12-01)

VLSI Implementation of a Run-time Reconfigurable Custom Computing Integrated Circuit
by: Musgrove, Mark D.
Published: (2014)

Design and implementation of reconfigurable DSP circuit architectures on FPGA
by: Heron, Jean-Paul Stephen
Published: (1998)

Improved Abstractions and Turnaround Time for FPGA Design Validation and Debug
by: Iskander, Yousef Shafik
Published: (2014)

Context Switching Strategies in a Run-Time Reconfigurable system
by: Puttegowda, Kiran
Published: (2014)

The Effects of Caching on Reconfigurable Adaptive Computing Systems
by: Hendry, James Hugh
Published: (2011)

Maverick: A Stand-Alone CAD Flow for Partially Reconfigurable FPGA Modules
by: Glick, Dallon Godfrey
Published: (2019)

FPGA Bootstrapping Using Partial Reconfiguration
by: Ostler, Patrick Sutton
Published: (2011)

Design and Implementation of an FPGA-based Partially Reconfigurable Network Controller
by: Chaubal, Aditya Prakash
Published: (2011)

Embedded electronic systems driven by run-time reconfigurable hardware
by: Fons Lluís, Francisco
Published: (2012)

OpenPR: An Open-Source Partial Reconfiguration Tool-Kit for Xilinx FPGAs
by: Sohanghpurwala, Ali Asgar Ali Akbar
Published: (2014)

Formalization of the concept of adaptive tasks mapping in the reconfigurable computers on FPGA
by: Iryna Klymenko, et al.
Published: (2018-03-01)

Dynamic Partial Reconfiguration of Concurrent Control Systems Specified by Petri Nets and Implemented in Xilinx FPGA Devices
by: Remigiusz Wisniewski
Published: (2018-01-01)

Characterization of Partial and Run-Time Reconfigurable FPGAs
by: Fazzoletto, Emilio
Published: (2016)

Resource Partitioning and Application Scheduling with Module Merging on Dynamically and Partially Reconfigurable FPGAs
by: Zhe Wang, et al.
Published: (2020-09-01)

MACRO BASED COMPILER FOR A PARTIALLY RECONFIGURABLE COMPUTER
by: HANDA, MANISH
Published: (2002)

BPR-TCAM—Block and Partial Reconfiguration based TCAM on Xilinx FPGAs
by: Anees Ullah, et al.
Published: (2020-02-01)

A Multiplexed Memory Port for Run Time Reconfigurable Applications
by: Atwell, James W.
Published: (2014)

DrawerPipe: A Reconfigurable Pipeline for Network Processing on FPGA-Based SmartNIC
by: Junnan Li, et al.
Published: (2019-12-01)

Automatic Instantiation and Timing-Aware Placement of Bus Macros for Partially Reconfigurable FPGA Designs
by: Subbarayan, Guruprasad
Published: (2014)

Block RAM-based architecture for real-time reconfiguration using Xilinx® FPGAs
by: Rikus le Roux, et al.
Published: (2015-07-01)

Securing embedded systems based on FPGA technologies
by: Devic, Florian
Published: (2012)

A MULTITHREADED RUNTIME SUPPORT ENVIRONMENT FOR DYNAMIC RECONFIGURABLE COMPUTING
by: PANDEY, ANKUR
Published: (2002)

Wormhole Run-Time Reconfiguration: Conceptualization and VLSI Design of a High Performance Computing System
by: Bittner, Ray Albert Jr.
Published: (2014)

Resource-Aware Task Scheduling and Placement in Multi-FPGA System
by: Zichang Sun, et al.
Published: (2019-01-01)

AN EVENT-BASED APPROACH TO DEMAND-DRIVEN DYNAMIC RECONFIGURABLE COMPUTING
by: LEE, TAI-CHUN
Published: (2001)

Accelerated Frame Data Relocation on Xilinx Field Programmable Gate Array
by: Kallam, Ramachandra
Published: (2010)

Facilitating FPGA Reconfiguration through Low-level Manipulation
by: Zha, Wenwei
Published: (2014)

MEMORY SYNTHESIS FOR FPGA-BASED RECONFIGURABLE COMPUTERS
by: KASAT, AMIT
Published: (2001)