Voltage Sag Ride-Through and Harmonics Mitigation for Adjustable Speed Drives using Dual-Functional Hardware

• Main Author: Salib, Anton Samir
• Format: Others
• Language: en
• Published: University of Waterloo 2007
• Subjects: Electrical & Computer Engineering; Voltage Sag Ride-Thorugh; Variable Speed Drives; Adaline; Power Quality; Harmonics Mitigatoin
• Online Access: http://hdl.handle.net/10012/2834

Great portion of today's industry are <em>Adjustable Speed Drives</em> (<em>ASD's</em>) operated in order to fulfill certain processes. When these processes are critical ones or sensitive to voltage disturbances, that might take place due to inserting high load in an area near to the Point of Common Coupling (<em>PCC</em>) of the process or due to a short term outage, few tens of thousands up to millions of dollars will be lost once such interruptions (voltage sags) take place as a result of the process failure. On the other hand, a distorted voltage waveform at the PCC for some sensitive process might malfunction as a result of the high harmonic content of the voltage waveform. Utilities are required to deliver as pure as possible sinusoidal voltage waveform according to certain limits; thus, they might apply fines against the consumers who are responsible for producing high amounts of current harmonics that affect the voltage wave shape at the <em>PCC</em> in order to force them to improve the consumer's load profile by adding filters at <em>PCC</em> for instance. Utilities are charging the consumers who are drawing power at poor power factor as well. <br /><br /> This thesis presents an <em>ASD</em> retrofitted with a dual-functional piece of hardware connected in series to its <em>DC-link</em> that is capable of handling the previously two mentioned problems. In other words, hardware that is capable of providing <em>voltage sag ride-through</em> during the voltage sag conditions on one side, on the other side, during the normal operating conditions, it is capable to mitigate the harmonic contents of the drawn current by the ASD's rectifier and to improve the power factor. <br /><br /> Survey on voltage sag ride-through for ASD's approaches are presented in the literature has been made. Approaches are classified as the topology utilized; first, topologies that utilizes energy storage elements that store energy to compensate the DC-link voltage with during the voltage sags, second, topologies retrofitting the DC-link itself with additional hardware to compensate the DC-link voltage. The first group is capable to provide voltage compensating during the full outages while the second can't. The presented voltage sag ride-through work of this thesis belongs to the second group. <br /><br /> Boost converter has been used as the hardware to compensate the DC-link voltage because of its simplicity and cheap price. An adaptive linear network (ADALINE) is investigated as the detection system to detect the envelope of the input voltage waveform. Once the envelope of the voltage goes below a certain level, the boost converter is activated to compensate the difference between voltage set point and the actual DC-link voltage. Simulation results supporting the proposed configuration are presented. <br /><br /> A third-harmonic current injection approach is utilized in this work in order to achieve <em>total harmonic distortion</em> (<em>THD</em>) mitigation from 32% to 5. 125% (theoretically). Two third-harmonic current injection networks have been investigated; one utilizes a real resistor, the other utilizes a resistor emulator to reduce the energy dissipated. The proposed controller for the resistor emulator does not require a proportional-integral (PI) controller. <br /><br /> As a result of the common devices between the voltage sag ride-through circuitry and the harmonic mitigation one, they can be integrated together in one circuitry connected in series with the DC-link of the ASD. And hence, the dual functionality of the hardware will be achieved. Simulation results supporting the theoretical results have been presented.