A gate matrix approach to VLSI logic layout

Bibliographic Details
Main Author:	Gani, Sohail M.
Published:	University of Essex 1990
Subjects:	621.31042 Integrated circuit design
Online Access:	http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.238380

id	ndltd-bl.uk-oai-ethos.bl.uk-238380
record_format	oai_dc
spelling	ndltd-bl.uk-oai-ethos.bl.uk-2383802015-03-19T07:56:19ZA gate matrix approach to VLSI logic layoutGani, Sohail M.1990621.31042Integrated circuit designUniversity of Essexhttp://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.238380Electronic Thesis or Dissertation
collection	NDLTD
sources	NDLTD
topic	621.31042 Integrated circuit design
spellingShingle	621.31042 Integrated circuit design Gani, Sohail M. A gate matrix approach to VLSI logic layout
author	Gani, Sohail M.
author_facet	Gani, Sohail M.
author_sort	Gani, Sohail M.
title	A gate matrix approach to VLSI logic layout
title_short	A gate matrix approach to VLSI logic layout
title_full	A gate matrix approach to VLSI logic layout
title_fullStr	A gate matrix approach to VLSI logic layout
title_full_unstemmed	A gate matrix approach to VLSI logic layout
title_sort	gate matrix approach to vlsi logic layout
publisher	University of Essex
publishDate	1990
url	http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.238380
work_keys_str_mv	AT ganisohailm agatematrixapproachtovlsilogiclayout AT ganisohailm gatematrixapproachtovlsilogiclayout
_version_	1716759686346178560

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