Partial dynamic reconfiguration of FPGAs for systolic circuits

Partial dynamic reconfiguration of FPGAs for systolic circuits

Bibliographic Details
Main Author:	Cadenas Medina, Oswaldo
Published:	University of Reading 2002
Subjects:	621 Parallel algorithms
Online Access:	http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.270913

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