Recursive and concurrent VLSI architectures for digital signal processing

Bibliographic Details
Main Author:	Yung, H. C.
Published:	University of Newcastle Upon Tyne 1985
Subjects:	621.3822 Information theory & coding theory
Online Access:	http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.481423

id	ndltd-bl.uk-oai-ethos.bl.uk-481423
record_format	oai_dc
spelling	ndltd-bl.uk-oai-ethos.bl.uk-4814232015-03-19T06:33:35ZRecursive and concurrent VLSI architectures for digital signal processingYung, H. C.1985621.3822Information theory & coding theoryUniversity of Newcastle Upon Tynehttp://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.481423Electronic Thesis or Dissertation
collection	NDLTD
sources	NDLTD
topic	621.3822 Information theory & coding theory
spellingShingle	621.3822 Information theory & coding theory Yung, H. C. Recursive and concurrent VLSI architectures for digital signal processing
author	Yung, H. C.
author_facet	Yung, H. C.
author_sort	Yung, H. C.
title	Recursive and concurrent VLSI architectures for digital signal processing
title_short	Recursive and concurrent VLSI architectures for digital signal processing
title_full	Recursive and concurrent VLSI architectures for digital signal processing
title_fullStr	Recursive and concurrent VLSI architectures for digital signal processing
title_full_unstemmed	Recursive and concurrent VLSI architectures for digital signal processing
title_sort	recursive and concurrent vlsi architectures for digital signal processing
publisher	University of Newcastle Upon Tyne
publishDate	1985
url	http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.481423
work_keys_str_mv	AT yunghc recursiveandconcurrentvlsiarchitecturesfordigitalsignalprocessing
_version_	1716750850394685440

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