An analogue VLSI study of temporally-asymmetric Hebbian learning
The primary aim of this thesis is to examine whether temporally asymmetric Hebbian learning is analogue VLSI can support temporal correlation learning and spike-synchrony processing. Novel circuits for synapses with spike-timing-dependent plasticity (STDP) are proposed. Results from several learning...
Main Author: | Bofill Petit, Adria |
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Published: |
University of Edinburgh
2005
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Subjects: | |
Online Access: | http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.641752 |
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