Non-volatile FPGA architecture using resistive switching devices
This dissertation reports the research work that was conducted to propose a non-volatile architecture for FPGA using resistive switching devices. This is achieved by designing a Configurable Memristive Logic Block (CMLB). The CMLB comprises of memristive logic cells (MLC) interconnected to each othe...
Main Author: | Ho, Patrick W. C. |
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Published: |
University of Nottingham
2017
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Subjects: | |
Online Access: | https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.740623 |
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