Reticle floorplanning and voltage island partitioning.

• Other Authors: Ching, Lap Sze.
• Format: Others
• Language: English; Chinese
• Published: 2006
• Subjects: Integrated circuits > Very large scale integration > Design and construction; Low voltage integrated circuits > Design and construction
• Online Access: http://library.cuhk.edu.hk/record=b5892947; http://repository.lib.cuhk.edu.hk/en/item/cuhk-325784

Ching Lap Sze. === Thesis (M.Phil.)--Chinese University of Hong Kong, 2006. === Includes bibliographical references (leaves 69-71). === Abstracts in English and Chinese. === Abstract --- p.i === Acknowledgement --- p.iv === Chapter 1 --- Introduction --- p.1 === Chapter 1.1 --- Shuttle Mask --- p.2 === Chapter 1.2 --- Voltage Island --- p.6 === Chapter 1.3 --- Structure of the Thesis --- p.8 === Chapter 2 --- Literature Review on Shuttle Mask Floorplanning --- p.9 === Chapter 2.1 --- Introduction --- p.9 === Chapter 2.1.1 --- Problem formulation --- p.10 === Chapter 2.2 --- Slicing Floorplan --- p.10 === Chapter 2.3 --- General Floorplan --- p.11 === Chapter 2.3.1 --- Conflict Graph Approaches --- p.11 === Chapter 2.3.2 --- Integer Linear Programming Approaches --- p.14 === Chapter 2.4 --- Grid Packing --- p.15 === Chapter 2.4.1 --- "(α,β,γ)-restricted Grid Approach" --- p.15 === Chapter 2.4.2 --- Branch and Bound Searching Approach --- p.17 === Chapter 3 --- Shuttle Mask Floorplanning --- p.18 === Chapter 3.1 --- Problem Description --- p.18 === Chapter 3.2 --- An Overview --- p.20 === Chapter 3.3 --- Modified α-Restricted Grid --- p.21 === Chapter 3.4 --- Branch and Bound Algorithm --- p.23 === Chapter 3.4.1 --- Feasibility Check --- p.25 === Chapter 3.5 --- Dicing Plan --- p.30 === Chapter 3.6 --- Experimental Result --- p.30 === Chapter 4 --- Literature Review on Voltage Island Partitioning --- p.36 === Chapter 4.1 --- Introduction --- p.36 === Chapter 4.1.1 --- Problem Definition --- p.36 === Chapter 4.2 --- Dynamic Programming --- p.38 === Chapter 4.2.1 --- Problem Definition --- p.38 === Chapter 4.2.2 --- Algorithm Overview --- p.38 === Chapter 4.2.3 --- Size Reduction --- p.39 === Chapter 4.2.4 --- Approximate Voltage-Partitioning --- p.40 === Chapter 4.3 --- Quad-tree Approach --- p.41 === Chapter 5 --- Voltage Island Partitioning --- p.44 === Chapter 5.1 --- Introduction --- p.44 === Chapter 5.2 --- Problem Formulation --- p.45 === Chapter 5.3 --- Methodology --- p.46 === Chapter 5.3.1 --- Coarsening and Graph Construction --- p.47 === Chapter 5.3.2 --- Tree Construction --- p.49 === Chapter 5.3.3 --- Optimal Tree Partitioning --- p.50 === Chapter 5.3.4 --- Tree Refinement --- p.52 === Chapter 5.3.5 --- Solution Legalization --- p.53 === Chapter 5.3.6 --- Time Complexity --- p.54 === Chapter 5.4 --- Direct Method --- p.55 === Chapter 5.4.1 --- Dual Grid-partitioning Problem (DGPP) --- p.56 === Chapter 5.4.2 --- Time Complexity --- p.58 === Chapter 5.5 --- Experimental Results --- p.59 === Chapter 6 --- Conclusion --- p.66 === Bibliography --- p.69