Xu, H., & 徐, 宏. (2021). Energy-Efficient On-Chip Cache Architectures and Deep Neural Network Accelerators Considering the Cost of Data Movement. Kyoto University.
Chicago Style (17th ed.) CitationXu, Hongjie, and 宏傑 徐. Energy-Efficient On-Chip Cache Architectures and Deep Neural Network Accelerators Considering the Cost of Data Movement. Kyoto University, 2021.
MLA (8th ed.) CitationXu, Hongjie, and 宏傑 徐. Energy-Efficient On-Chip Cache Architectures and Deep Neural Network Accelerators Considering the Cost of Data Movement. Kyoto University, 2021.
Warning: These citations may not always be 100% accurate.