Synthèse d'architectures de circuits FPGA tolérants aux défauts

Synthèse d'architectures de circuits FPGA tolérants aux défauts

L'essor considérable de la technologie CMOS a permis l'accroissement de la densité d'intégration selon la loi de Moore. Cependant, la poursuite de cette évolution est en voie de ralentissement dû aux contraintes physiques et économiques. Le défi devient alors de pouvoir utiliser un ma...

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Bibliographic Details
Main Author:	Blanchardon, Adrien
Other Authors:	Paris 6
Language:	fr
Published:	2015
Subjects:	FPGA FPGA mesh FPGA mesh of clusters Défauts Redondance matérielle Flot de conception Fiel Programmable Gate Array (FPGA) 004.2
Online Access:	http://www.theses.fr/2015PA066274/document

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